The 86th AICS Cafe (Two speakers)
Date and Time: Tue. Mar. 15, 2016, 12:15-13:45
12:00 - 12:15 light meal & coffee break
12:15 - 13:00 AICS Cafe (1)
Niclas Jansson (Complex Phenomena Unified Simulation Research Team)
Presentation Language: English
Presentation Material: English
Lee Jinpil (Programming Environment Research Team)
Presentation Language: Japanese
Presentation Material: Japanese
Place: Workshop room (6th floor) at AICS
*A light meal will be provided in this session. Hope you will enjoy!
Attention:
- You may bring your own lunchbox with lid.
- Foods like Cup noodles are NOT allowed as it is easy to spill.
- Please be seated when eating and make sure the floor doesn't get dirty.
- Please use a trash box.
*This session will be held on Tuesday!
(1) 12:15 - 13:00
Title: Towards large-scale industrial simulations on the K computer
Speaker: Jansson LeifNiclas (Complex Phenomena Unified Simulation Research Team)
We present our work on developing a unified simulation framework for efficient computation of time resolved approximations for complex industrial flow problems. To address the challenges of modern and emerging supercomputers, efficient data structures and communication patterns are needed. Here, we use a Cartesian grid together with a Lagrangian based immersed boundary method to accurately capture moving, complex geometries. The asymmetric workload of the immersed boundary is balanced by a predictive dynamic load balancer, and a multithreaded halo-exchange algorithm is employed to efficiently overlap communication with computations. Our work also concerns efficient methods for handling the large amount of data produced by large-scale flow simulations, such as scalable parallel I/O, data compression and in-situ processing.
(2) 13:00 - 13:45
Title: Research on PGAS Runtime on Multi-core Clusters
Speaker: Lee Jinpil (Programming Environment Research Team)
Current trends in processor architecture is increasing the number of cores. Modern CPUs now have 2~16 cores and the Intel Xeon Phi coprocessor has more than 60 cores with 4 hardware threads. This trends force the user to describe fined-grained task-parallelism to exploit lots of cores within a chip. The current programming models in High Performance Computing area lack the ability of describing fine-grained tasking. Combining them with thread-level programming model such as OpenMP is not sufficient because task dependency requires data movement which may cause inter-node communication. The aim of the research is to design and implement programming interface for fine-grain task-parallelism in a PGAS language, named XcalableMP. XcalableMP supports data-parallelism among nodes by describing directives to the serial code. The extended task syntax may include inter-node communication to data exchange between tasks as well as execution dependencies among tasks. The presentation will show the prototype implementation of task-parallelism and performance evaluation of the task parallelism in the XcalableMP framework.